The present invention concerns an electrode means comprising first and second thin-film electrode layers with electrodes in the form of parallel strip-like electrical conductors in each layer, wherein the electrodes of the second electrode layer are oriented crosswise or substantially orthogonally to the electrodes of the first layer, wherein at least one of the electrode layers is provided on an insulating surface of a substrate or backplane, and wherein the electrode layers are provided in parallel spaced-apart planes contacting a globally provided layer of a functional medium therebetween; as well as a method for manufacturing an electrode means of this kind.
The present invention further concerns an apparatus comprising at least one electrode means comprising first and second thin-film electrode layers with electrodes in the form of parallel strip-like electrical conductors in each layer, wherein the electrodes of the second electrode layer are oriented crosswise or substantially orthogonally to the electrodes of the first layer, wherein at least one of the electrode layers is provided on an insulating surface of a substrate or backplane, and wherein the electrode layers are provided in parallel spaced-apart planes contacting a globally provided layer of a functional medium therebetween, wherein functional elements are formed in volumes of the functional medium defined at respective overlaps between electrodes of the first electrode layer and the electrodes of the second electrode layer to provide a matrix-addressable array, wherein a functional element can be activated by applying a voltage to the crossing electrodes defining the functional element such that a potential is generated across the latter, whereby the physical state of a functional element may be temporarily or permanently changed or a switching between discernible physical states take place, said voltage application essentially corresponding to an addressing of the functional element for write or read operations thereto, and wherein the functional elements according to the properties of a selected functional material can be made to operate as at least one of the following, viz. switchable logic elements of a data processing apparatus, memory cells in a data storage apparatus, or pixels in an information displaying apparatus, whereby the addressing of said elements, cells or pixels in any case takes place in a matrix-addressing scheme.
Finally, the present invention also concerns uses of the electrode means according to the invention in the apparatus according to the invention.
The present invention particularly concerns electrode means for use in apparatuses and devices comprising functional elements in a planar array, wherein the functional elements are addressed via respectively a first electrode means with parallel strip-like electrodes arranged in contact with the functional elements on one side thereof and another electrode means with similar electrodes, but oriented perpendicular to the electrodes of the first electrode means and provided in contact with the opposite side of the functional elements. This constitutes what is called a matrix-addressable device. Such matrix-addressable devices can comprise e.g. functional elements in the form of logic cells, or in the form of memory cells. The functional elements may include one or more active switching means, in which case the matrix-addressable device is termed an active matrix-addressable device, or the functional elements may consist of passive means only, e.g. resistive or capacitive means in which case the matrix-addressable device is termed a passive matrix-addressable device.
The latter is regarded as providing a most efficient way of addressing, for instance in case of memory devices, as no switching elements, viz. transistors are required in a memory cell. It is then desirable to achieve as high storage density as possible, but present design rules which set a lower limit to the cell, also limit the fill factor thereof, i.e. the area of the memory material of the matrix-addressable memory device that actually can be used for storage purposes.
A prior art passive matrix-addressable device is shown in FIG. 1a and comprises an essentially planar global layer 3 of functional material in sandwich between a first electrode means comprising parallel strip-like electrodes 1 of width w and spaced apart by a distance d and a similar second electrode means comprising parallel strip-like electrodes 2 of the same width w, but with the electrodes 2 arranged perpendicular to the electrodes 1. In the global layer 3 of functional material the overlap between the electrodes 1, 2 of the respective electrode means defines a functional element 5 in the functional material of the global layer 3. By applying voltage to the electrodes crossing at this location, a physical state of the functional element which e.g. can be a logic cell, or a memory cell, may be changed or switched.
FIG. 1b shows the prior art device of FIG. 1a in a section taken along the line Xxe2x80x94X making the layout of the electrodes 1,2 and the global layer of the sandwiched functional material 3 as well as the location of the functional element 5 apparent. The functional material of the global layer 3 usually has properties such that an application of the voltage to crossing electrodes 1,2 only will affect the functional element 5 at the crossing thereof and not neighbouring functional elements or cells at the electrodes crossings in the vicinity of the former. If the functional material of the global layer e.g. is electrically conducting, this can be achieved by providing it with anisotropic conducting property, such that conduction only can take place in a vertical direction to the functional material and between the overlapping electrodes, with no current flowing through the global layer to the other functional elements. However, for a large number of applications the functional material of the global layer can be non-conducting, i.e. dielectric, and the functional element can be regarded as highly resistive or a pure dielectric such that it will be behave like a capacitor. The dielectric material may be a polarizable inorganic or organic material and capable of exhibiting hysteresis. Such materials include both ferroelectric and electret materials and their capability of becoming polarized and exhibiting hysteresis are exploited in e.g. ferroelectric matrix memories or electret matrix memories with a device configuration similar to that shown in FIG. 1a. In such devices the polarization state in a memory cell, i.e. the functional element 5, may be set by a proper application of voltages to the electrodes defining the memory cell 5 at their overlap and the polarization can be switched or the cell can be restored to an initial state by operations which shall conform to write and read operations to the memory cell. The functionality of such matrix devices is, of course, not only dependent on the functional material selected, but also on architectural and structural constraints of the memory device. The storage capacity in the memory medium in this global layer 3 depends on the size and density of the memory cells 5 and these will in their turn depend on the minimum process-constrained feature that can be created in the manufacturing process. Such features are e.g. when electrodes are laid down as metallization which afterwards is patterned in a photomicrolithographic process resorting to photolithographic masks and e.g. etching, dependent on the smallest process-constrained feature f that can be defined by the mask and its value will in its turn depend on the wavelength of the light used. In other words, this feature f will usually within the scope of today""s technology be limited to say 0.15-0.2 xcexcm, and hence the width w of the electrodes 1,2 and the spacings therebetween will be of about this magnitude.
In that connection it should be noted that the value 2f usually is termed the pitch and that the maximum number of lines per unit length as obtainable with prior art fabrication technology is given by the factor xc2xdf and correspondingly the maximum number of features per unit area by the factor xc2xcf2. Hence if the area 4 shown in FIG. 1 is considered, it will be evident that the size of the cell is given by f2 as apparent from FIG. 1c which shows the area 4 in greater detail. Each cell requires a real estate corresponding to the area 4, the size of which is 4f2, in other words, four times larger than the area f2 of the cell. This consideration shows that the matrix in FIG. 1a has a fill factor of 0.25, i.e. f2/4f2. The degree of exploitation of the area offered by the layer 3 is thus low. In order to arrive at a higher fill factor or a higher density of functional elements or cells 5 in the global layer 3 it would be desirable to increase either the fill factor or to obtain a higher resolution in the process-constrained features of the matrix, e.g. into the sub-0.1 xcexcm range. However, although this may increase the total number of cells in similar area, still would not be able to guarantee a higher fill factor.
In the matrix devices of the active kind, i.e. also comprising at least one active switching element associated with each functional element or cell, the fill factor becomes even lower, typically in the order of ⅙, i.e. a fill factor of only 16.7%.
From U.S. Pat. No. 5,017,515 (Gill, assigned to Texas Instruments Inc.) there is known a process for forming sublithographic distances between elements in an integrated circuit. As depicted in FIG. 1 of this publication this process is suitable for forming an electrode layer with dense parallel strip-like electrodes 13, 19 mutually isolated by an isolation feature 14 which is not subject to any dimensional constraints as imposed by the use of a photomicrolithographic process, but which can be made very thin indeed compared to the dimensions of the conductors or the electrodes. The publication discloses how an electrode means of this kind can be used for forming stripe-like floating gate electrodes in an integrated circuit device, e.g. a semiconductor memory device with memory cells comprising a switching and storage transistor structure respectively. Bit lines are formed by a suitable doping of a substrate, evidently using the same photomask in the doping process as used in the process for forming the dense electrode layer. The bit lines and word lines/control gate electrodes 42 are formed separated by an insulator from floating gates 13 and 19, resulting structure being an array of semiconductor memory with multiterminal memory cells comprising transistors. However, no hint or directions are given in U.S. Pat. No. 5,017,515 for forming an electrode means with two electrode layers each comprising electrodes in a dense arrangement and oriented such that the electrodes of the two electrode layers together forms an electrode matrix suitable for addressing functional elements in a globally provided layer of a functional medium located between the electrode layers and contacting the electrodes thereof. The efficient exploitation of matrix addressing of a global layer of a functional medium also presupposes a high degree of planarization inherent in the layers of a matrix-addressable device of this kind, but this is not readily achieved in the prior art technology as the creation of topographical structures extending orthogonally above the substrate shall imply that additional electrode layers would reproduce the outline of these structures in the surface features. Also the prior art would be unsuitable in case a plurality of such matrix-addressable arrays shall be stacked to form volumetric devices, e.g. a stack of a plurality of matrix-addressable memory device as known in the art.
An example of a passive matrix-addressable data processing or memory device with electrode layers disposed on either side of the functional medium such that the electrodes form an orthogonal electrode matrix, is for instance disclosed in published International application WO098/58383. Obviously an apparatus of this kind shall benefit with regard to increasing the density of the functional elements in the matrix by increasing the fill factor of the electrodes in each electrode layer, as the functional elements in the matrix which may correspond e.g. to a memory cell, in any case shall be defined by the overlap area formed by the crossing between the electrodes of the first and second electrode layer respectively.
In view of the above considerations it is a major object of the present invention to enable an increase of the fill factor in matrix devices of the afore-mentioned kind to a value approaching unity and achieve a maximum exploitation of the real estate offered by the global layer 3 of the functional material in such devices without actually being constrained by the actual or practical size of the minimum process-constrained feature f, as the fill factor will not be influenced by decrease in f, although such a decrease of course, will serve to further increase the maximum number of functional elements or cells obtainable in a global layer 3.
Matrix devices of the kind shown in FIG. 1a may be stacked on the top of each other to form volumetric devices in which case a single device is separated from the following device in the stack by a separation or isolating layer to prevent the application of voltages to electrodes in one of the devices and the switching of functional elements therein from affecting neighbouring devices in the stack. Such volumetric devices shall, of course, allow for large-capacity volumetric memory devices, but it will be easily seen that if the fill factor could be increased to unity or 100%, the total capacity of a single matrix device then might approach the capacity of four similar conventional matrix devices stacked to form a volumetric device.
While there in theory is no limit as to the number of devices forming the stack, it is a disadvantage that undesired kinds of electrical, physical and thermal couplings may be introduced between the devices in the stack upon, say a massive parallel addressing of functional elements in the various devices. A further disadvantage is an inherent unevenness in each single device of the stack. Although a device may be regarded as substantially planar, the unevenness will propagate as devices are added to the stack which obtains an increasing bumpiness as device after device are stacked upon each other. Such bumpiness will also be very undesirable in an essentially planar circuit technology.
In light of this a secondary object of the present invention is an increase the overall capacity with regard of the number of functional elements that can be obtained in a matrix device, thus reducing the need for developing multilayer or volumetric devices, i.e. a stack with many layers, when a comparable capacity can be achieved with a stack comprising only a quarter of the number of devices or layers that would be needed in prior art technology.
Finally, it is also an object of the present invention to provide an electrode means that easily can be processed to provide a high degree of planarity, thus avoiding surface unevenness or bumpiness and making the electrode means better suited for application in stacked volumetric devices.
The above objects as well as further advantages and features are achieved according to the present invention with an electrode means which is characterized in that each of the thin-film electrode layer comprises a first set of said strip-like electrodes of width wa and thickness ha provided on the substrate, the electrodes of the first set being mutually spaced apart by distance d equal to or greater than wa, a second set of said strip-like electrodes with width wb and thickness hb provided in the spacings between the electrodes of the first set and electrically insulated therefrom by a thin film of an electrically insulating material with thickness xcex4 and at least extending along the side edges of the parallel electrodes and forming an insulating wall of thickness xcex4 therebetween, the magnitude of xcex4 being small compared to the magnitude of either wa or wb, with the spacing distance d between the electrodes of the first set being wb+2xcex4, and that the electrode layers with electrodes and the insulating thin film forms global planar layers in the electrode means.
Advantageously the conducting material of the electrodes in at least one electrode layer can be provided directly on the surface of the substrate.
Also advantageously the electrodes of one of the electrode layers can be exposed to the exterior of the surface thereof opposite the other electrode layer or alternatively can the surface of one of the electrode layers opposite to the other electrode layer be covered by a backplane.
In an advantageous embodiment of the electrode means according to the invention the sectional area of the electrodes of both sets is equal, such that waxc2x7ha=wbxc2x7hb.
In another advantageous embodiment of the electrode means according to the invention the sectional area of the electrodes of the first set is different from that of the electrodes of the second set such that waxc2x7haxe2x89xa0wbxc2x7hb.
In further advantageous embodiment of the electrode means according to the invention the conducting material of the electrodes of both sets is the same.
In a yet further advantageous embodiment of the electrode means according to the invention the conducting material of the electrodes of the second set is different from the conducting material of the electrodes of the first set.
In the latter case it is preferred that the conducting material of the electrodes of the first set and the conducting material of the electrodes of the second set have conductivities of magnitudes "sgr"a, "sgr"b respectively, such that a relation                     w        a                    w        b              ÷                  h        a                    h        b              =            σ      b              σ      a      
is obeyed, making the conductive capacity of each electrode of the first and second electrode sets respectively, equal in any case.
In a preferred embodiment of the electrode means according to the invention the insulating walls between the electrodes of the first set and the electrodes of the second set form a portion of the insulating thin film provided in a continuous layer covering the electrodes of the first set and in case also a substrate in the spacings between the former, the electrodes of the second set are provided in recesses between the wall portions of the insulating thin film and in case also above a portion thereof covering the substrate, the top surface of electrodes of the second set being flush with the surface of a portion of the insulating thin film covering the top surface of the electrodes of the first set, whereby the electrodes of both the first and the second sets have the equal heights ha=hb, and the electrode layers with electrodes and the insulating thin film form a global planar layers in the electrode means.
In another preferred embodiment of the electrode means the insulating walls between the electrodes of the first set and the electrodes of the second set form portions of the thin film of insulating material provided in a layer covering the side edges of the electrodes of the first set up to the top surface thereof and in case also a substrate in the spacings between the former, the electrodes of the second set are provided in recesses between the wall portion of the insulating thin film and in case also above the portion thereof covering the substrate, the electrodes of the second set being flush with the top edge of the insulating walls as well as the top surface of the electrodes of the first set, whereby the electrodes of the second set have the height hb=haxe2x88x92xcex4, and the electrode layers with electrodes and insulating material form a global planar layers of thickness ha in the electrode means.
In yet another preferred embodiment of the electrode means according to the invention the insulating walls between the electrodes of the first set and the electrodes of the second set form a portion of the insulating thin film provided in layer covering the electrodes of the first set down to a substrate, the electrodes of the second set are provided in recesses between the wall portions of the insulating thin film and directly on the exposed substrate and flush with the top surface of a portion of the insulating thin film covering the top surface of the electrodes of the first set, whereby the electrodes of the first set have the height ha=hbxe2x88x92xcex4, and the electrode layers with electrodes and the insulating thin film forms global planar layers of thickness hb in the electrode means.
The objects of the invention as well as the additional advantages and features are also achieved according to the present invention with a method for manufacturing an electrode means, the method being characterized by steps for depositing a planar layer of electrical conducting material with a thickness ha on the substrate, patterning said planar layer of conducting material to form a first set of said strip-like electrodes with width wa and thickness ha mutually spaced apart by recesses therebetween created in the patterning process removing portions of the conducting material and exposing the surface of the substrate between the strip-like electrodes of the first set, the parallel electrodes of the first set thus being spaced apart by the distance d being equal to the width of the recesses between said electrodes and equal to or greater than wa, forming a thin film of electrically insulating material covering at least the side edges of the electrodes of the first set, and depositing an electrical conducting material in the recesses between the insulating thin film covering the side edges of the electrodes of the first set to form a second set of electrodes with a width wb and thickness hb, such that the electrode layer is obtained as a global planar layer in the electrode means.
In an advantageous embodiment of the method according to the invention the insulating thin film is formed as global layer covering both the first set of electrodes and the exposed surface of the substrate, the conducting material for electrodes of the second set deposited in the recesses between the electrodes of the first set and above the insulating thin film, and the electrode layer planarized such that the top surfaces of the electrodes of the second set are flush with the insulating thin film covering the electrodes of the first set.
In another advantageous embodiment of the method according to the invention the insulating thin film is formed as global layer covering the electrodes of the first set and the exposed surface of the substrate, the conducting material for electrodes of the second set deposited in the recesses between the electrodes of the first set and above the insulating thin film, and the electrode layer planarized such that the insulating thin film covering the electrodes of the first set is removed to expose the top surfaces of said electrodes and such that the surfaces of the electrodes of the of both sets and top edges of the insulating thin film all are flush in the top surface of the electrode layer.
In yet another advantageous embodiment of the method according to the invention the insulating thin film is formed as global layer covering both the electrodes of the first set and the exposed surface of the substrate, the insulating thin film at the bottom of the recesses removed, leaving only the insulating thin film covering the electrodes of the first set down to substrate and exposing the surface thereof, the conducting material of the electrodes of the second set deposited in said recesses, and electrode layer planarized such that the top surfaces of the electrodes of the second set and the surface of the insulating thin film covering the electrodes of the first set all are flush in the top surface of the electrode layer.
In a preferred embodiment of the method according to the invention a global layer of a functional medium can be deposited covering the one electrode layer provided on a substrate and contacting the electrodes thereof and a second electrode layer then formed directly on the global layer of a functional medium by similar steps as those used for forming an electrode layer on the substrate. Preferably can then a substrate or a backplane be provided covering the electrode layer formed on the global layer of a functional medium.
In the method according to the invention it is preferable selecting the conducting material of the electrodes of the first set and/or a substrate material as materials amenable to surface oxidation, and forming the insulating thin film by oxidizing the surface of either in at least one oxidation process as appropriate.
Finally, the above objects as well as further advantages and features are achieved according to the present invention with an apparatus characterized in that the electrodes of each electrode means are provided in a respective electrode layer, that the electrodes in the electrode means all have about the same width w, that electrodes of each means are mutually insulated electrically by an insulating thin film of thickness xcex4, the magnitude of xcex4 being a fraction of the width w, and that minimum magnitude of w is comparable to a process-constrained minimum feature size f, whereby the fill factor of functional elements in functional medium relative thereto is close to 1 and the number of functional elements approaches a maximum defined by the total area A of the functional medium sandwiched between the electrode means and said feature size f, said maximum thus being defined by A/f2.
Finally, the above objects as well as further advantages and features are achieved according to the present invention with the use of the electrode means according the invention in the inventive apparatus in order to perform a passive matrix addressing to the functional elements constituting the matrix-addressable array of the apparatus, as well as the use of the electrode means according to the invention in the inventive apparatus wherein each functional element is connected with at least one active switching component, in order to perform an active matrix addressing to the functional elements constituting the matrix-addressable array of the apparatus.